Field of Disclosure
Embodiments described herein generally relate to a framework for randomizing instruction sets, memory registers, and pointers of a computing system.
Description of Related Art
The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Instruction sets, memory registers, and pointers that are used in most computing systems are fairly standardized. Standardized machine instruction sets provide consistent interfaces between software and hardware, but they are a double-edged sword. Although they yield great productivity gains by enabling independent development of hardware and software, the ubiquity of well-known instructions sets also allows a single attack designed around an exploitable software flaw to gain control of thousands or millions of systems. Accordingly, having a standardized instruction set facilitates intellectual property theft, computer exploitation, hacking and the like.
Address space layout randomization (ASLR) is a memory-protection process for operating systems (OSes) that guard against buffer-overflow attacks by randomizing the location where system executables are loaded into memory. While ASLR is a practice to randomize instruction addresses in library code, and is a form of ontology encoding that thwarts library injection code attacks, ASLR does not address the challenges faced by a cloud application that is based on binary code static instruction addresses.
Accordingly, a technique is required to address the above stated deficiencies in the art and to further provide software protection such that code cannot be decrypted or attacked by side-channels.